ATmega128
The following code example shows one assembly and one C function for turning off the W DT.
The example assumes that interrupts are controlled (e.g. by disabling interrupts globally) so that
no interrupts will occur during execution of these functions.
Assembly Code Example
WDT_off:
; Reset WDT
wdr
in r16, WDTCR
; Write logical one to WDCE and WDE
ori r16, (1<<WDCE)|(1<<WDE)
out WDTCR, r16
; Turn off WDT
ldi r16, (0<<WDE)
out WDTCR, r16
ret
C Code Example
void WDT_off( void )
{
/* Reset WDT */
__watchdog_reset();
/* Write logical one to WDCE and WDE */
WDTCR |= (1<<WDCE) | (1<<WDE);
/* Turn off WDT */
WDTCR = 0x00;
}
Timed Sequences for Changing the Configuration of the Watchdog Timer
The sequence for changing configuration differs slightly between the three safety levels. Sepa-
rate procedures are described for each level.
Safety Level 0
Safety Level 1
Safety Level 2
This mode is compatible with the W atchdog operation found in ATmega103. The W atchdog
Timer is initially disabled, but can be enabled by writing the W DE bit to 1 without any restriction.
The time-out period can be changed at any time without restriction. To disable an enabled
W atchdog Timer, the procedure described on page 55 ( W DE bit description) must be followed.
In this mode, the W atchdog Timer is initially disabled, but can be enabled by writing the W DE bit
to 1 without any restriction. A timed sequence is needed when changing the W atchdog Time-out
period or disabling an enabled W atchdog Timer. To disable an enabled W atchdog Timer, and/or
changing the W atchdog Time-out, the following procedure must be followed:
1. In the same operation, write a logic one to W DCE and W DE. A logic one must be written
to W DE regardless of the previous value of the W DE bit.
2. W ithin the next four clock cycles, in the same operation, write the W DE and W DP bits as
desired, but with the W DCE bit cleared.
In this mode, the W atchdog Timer is always enabled, and the W DE bit will always read as one. A
timed sequence is needed when changing the W atchdog Time-out period. To change the
W atchdog Time-out, the following procedure must be followed:
57
2467X–AVR–06/11
相关PDF资料
ATMEGA64RZAPV-10AU BUNDLE ATMEGA644P/AT86RF230 TQFP
ATP101-TL-H MOSFET P-CH 30V 25A ATPAK
ATP102-TL-H MOSFET P-CH 30V 40A ATPAK
ATP103-TL-H MOSFET P-CH 30V 55A ATPAK
ATP104-TL-H MOSFET P-CH 30V 75A ATPAK
ATP106-TL-H MOSFET P-CH 40V 30A ATPAK
ATP107-TL-H MOSFET P-CH 40V 50A ATPAK
ATP108-TL-H MOSFET P-CH 40V 70A ATPAK
相关代理商/技术参数
ATMEGA128RFA1-ZUR SL514 制造商:Atmel Corporation 功能描述:
ATMEGA128RFA1-ZUR00 制造商:Atmel Corporation 功能描述:2.4GHZ 802.15.4 128K SOC REVF 制造商:Atmel Corporation 功能描述:2.4GHZ 802.15.4 128K SOC REVF T&R - Bulk 制造商:Atmel from Components Direct 功能描述:ATMEL ATMEGA128RFA1-ZUR00 MICROCONTROLLERS (MCU) 制造商:Atmel 功能描述:Atmel ATMEGA128RFA1-ZUR00 Microcontrollers (MCU) 制造商:Atmel Corporation 功能描述:MCU AVR 2.4GHZ 128K FLASH 64VQFN 制造商:Atmel Corporation 功能描述:2.4GHZ 802.15.4 128K SOC Revision F 制造商:Atmel 功能描述:2.4GHZ 802.15.4 128K SOC REVF
ATMEGA128RFR2-ZF 功能描述:IC RF TXRX+MCU 802.15.4 64-VFQFN 制造商:microchip technology 系列:- 包装:托盘 零件状态:在售 类型:TxRx + MCU 射频系列/标准:802.15.4 协议:Zigbee? 调制:DSSS, O-QPSK 频率:2.4GHz 数据速率(最大值):2Mbps 功率 - 输出:3.5dBm 灵敏度:-100dBm 存储容量:128kB 闪存,4kB EEPROM,16kB SRAM 串行接口:I2C,JTAG,SPI,USART GPIO:35 电压 - 电源:1.8 V ~ 3.6 V 电流 - 接收:5mA ~ 12.5mA 电流 - 传输:8mA ~ 14.5mA 工作温度:-40°C ~ 125°C 封装/外壳:64-VFQFN 裸露焊盘 标准包装:260
ATMEGA128RFR2-ZU 制造商:Atmel Corporation 功能描述:2.4GHZ 802.15.4 128K SOC IND 85C - Bulk
ATMEGA128RFR2-ZUR 制造商:Atmel Corporation 功能描述:2.4GHZ 802.15.4 128K SOC 85C T&R - Tape and Reel
ATMEGA128RZAV-8AU 功能描述:射频微控制器 - MCU AVR Z-Link Bundle RoHS:否 制造商:Silicon Labs 核心:8051 处理器系列:Si100x 数据总线宽度:8 bit 最大时钟频率:24 MHz 程序存储器大小:64 KB 数据 RAM 大小:4 KB 片上 ADC:Yes 工作电源电压:1.8 V to 3.6 V 工作温度范围:- 40 C to + 85 C 封装 / 箱体:LGA-42 安装风格:SMD/SMT 封装:Tube
ATMEGA128RZAV-8MU 功能描述:射频微控制器 - MCU AVR Z-Link Bundle RoHS:否 制造商:Silicon Labs 核心:8051 处理器系列:Si100x 数据总线宽度:8 bit 最大时钟频率:24 MHz 程序存储器大小:64 KB 数据 RAM 大小:4 KB 片上 ADC:Yes 工作电源电压:1.8 V to 3.6 V 工作温度范围:- 40 C to + 85 C 封装 / 箱体:LGA-42 安装风格:SMD/SMT 封装:Tube